Salary: Negotiate

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Job content

Responsibilities:

. Closely work with designers and architect to come up with verification and execution plans
. Influence and drive verification environment architecture with a team of engineers
. Participate in verification of a complex IP block, take ownership of some of the key features
. Work on test plans, test case development, regression and coverage closure
. Guide and mentor junior engineers as required
. Desire and enthusiasm to grow into leadership role taking progressive responsibility over time

Qualifications:
. At least 6 years of experience focused on IP and/or SOC verification with successful completion of production silicon
. Ability to understand existing verification infrastructure, and execute projects based on those, at the same time influence improvements in existing flows/infrastructure
. Solid understanding of System Verilog constructs, UVM, and C++ is required
. Experience writing scripts in Perl or Python, good knowledge in Makefile is a plus
. Requires strong understanding of state of the art of verification techniques, including assertion and metric-driven verification
. Good understanding of code and functional coverage, ability to influence coverage improvement with design and verification teams
. Experience and ability to influence regression management tools and processes

Responsibilities: . Closely work with designers and architect to come up with verification and execution plans . Influence and drive verification environment architecture with a team of engineers

Recommended Skills
  • Architecture
  • C++ (Programming Language)
  • Infrastructure Management
  • Leadership
  • Make (Software)
  • Passionate
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